1. Field of the Invention
The present invention relates to: a wiring structure forming method suitable for use in a display device represented by a liquid crystal display device and a semiconductor device represented by large-scale integrated circuit; a wiring structure; a semiconductor device forming method suitable for manufacture of a thin-film transistor or the like; and a display device.
2. Description of the Related Art
In general, an aluminum (Al) layer and/or an aluminum alloy layer is mainly used as a metal layer which is applied to wires or electrodes of a semiconductor device represented by a large-scale integrated circuit (LSI) or an ultra large-scale integrated circuit (ULSI). In recent years, there has been a growing demand for further downsizing, thinner wiring, higher operating speed and the like in order to improve integrity in the field of semiconductor devices represented by such LSIs and ULSIs. For this reason, copper (Cu) or its alloy having lower specific resistance than aluminum and having high tolerance to, for instance, electro-migration or storage migration has been discussed as a material for a next generation wiring structure (such as wires or electrodes).
Also in the field of display devices represented by a liquid crystal display device, in recent years, there has been a tendency for wiring length to increase because of expansion of a display area. In addition, monolithic production of peripheral circuit portions including a driver circuit and development of acquiring added functions such as a pixel internal memory or an optical sensor have been underway. Therefore, in the field as well, there has been a growing demand for low-resistance wiring structure, as in the semiconductor field.
A wiring structure consisting essentially of copper has been conventionally formed in accordance with a sputtering method, a CVD method, a plating method or the like. The above-described technique or techniques are disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 2001-68679, Material Research Society Symposium Proceeding Vol. 612 D. 7.1.1 (2000) and Journal of Electrochemical Society Vol. 148, C47-C53 (2001).
It is known that a wiring layer (wiring structure) formed by the sputtering method, CVD method, plating method or the like, and consisting essentially of copper, is small in crystalline grain size and comparatively large in specific resistance. Conventionally, in the case where a metal layer consisting essentially of copper is used as a wiring structure, this metal layer is subjected to annealing (furnace annealing) by a heat source such as a heater in a heating furnace, thereby increasing the size of crystalline grains and lowering a specific resistance value.
However, if the metal layer consisting essentially of copper is annealed by furnace annealing, there newly occurs a problem that surface irregularities increase due to crystalline grain growth although crystalline grains increase in size and specific resistance is lowered. For this reason, there is a problem that a metal layer made of crystalline grains grown by annealing is hardly applied to a semiconductor device or a display device.